发明名称 METHOD OF GENERATING SUPERPOSED INTERLEAVER AND MEMORY ADDRESS
摘要 PROBLEM TO BE SOLVED: To reduce the size and cost of hardware by using minimally required memory alone. SOLUTION: A superposed interleaver which interleaves using a specified interleaving interval (B) as one period is composed from an input buffer 21, a SRAM 22, an address generator 23, an output buffer 24 and a control section 25. A RAM 22 which is memory composed from (B-1) vertical edges and the horizontal length of (B/2)×M cells is used instead of memory which is composed from (B-1) vertical edges and horizontal length of (B-1)×M cells as a method of the address generation of memory and a physical address for accessing the SRAM 22 is generated by an address generating section 23. In this case, while holding the physical address for the period of one clock, the data stored in the physical address is read out in half the period before the clock and the data inputted at present is written into the physical address in half the after period of the clock.
申请公布号 JPH10214486(A) 申请公布日期 1998.08.11
申请号 JP19970175980 申请日期 1997.07.01
申请人 DAEWOO ELECTRON CO LTD 发明人 KEN GOSO
分类号 G11C11/41;H03M13/00;H03M13/27;(IPC1-7):G11C11/41;H03M13/22 主分类号 G11C11/41
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