| 摘要 |
A memory device includes a plurality of PMOS transistors and a voltage regulator circuit. Each transistor has a gate, a source region, a drain region, and a well containing the source and drain regions. Each transistor is characterized by a threshold voltage which is dependent on temperature and on a body-source bias voltage. Each transistor is also characterized by a sub-threshold current which is dependent on the transistor's threshold voltage. The voltage regulator circuit is operatively coupled to each well to provide the body-source bias voltage to each well. The voltage regulator circuit temperature-compensates the body-source bias voltage to maintain the threshold voltage of each transistor approximately constant despite changes in temperature. The memory device thus advantageously has a relatively constant stand-by current despite temperature variations.
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