| 摘要 |
PROBLEM TO BE SOLVED: To demodulate the data, to halve a correlation period to produce a synchronizing signal in a short time and to reduce both power consumption and memory capacity by performing the frequency analysis of the time waveform of a modulated signal where a section correlated with a guard section is included in a part that is separated from the modulated signal by a single modulation time in a data main body section. SOLUTION: The time series data sent from a digital I/Q demodulator 34 are supplied to an FFT circuit 35 where the guard section is eliminated from the time series data and the time series data are converted into the frequency series data. The frequency series data are supplied to a data demodulator 36 and demodulated there, and these demodulated data appear at an output terminal 37. The I and Q data sent from the demodulator 34 are directly supplied to the memories 42 and 44 and also to the memories 41 and 43 via the delay circuits 39 and 40. A memory control circuit writes the data for only the shortest period when the correlation can be substantially detected into every memory. the correlations of both I and Q data are secured by the correctors 46 and 47 respectively, and a clock is reproduced. |
