| 摘要 |
PROBLEM TO BE SOLVED: To provide a high-speed NOR type of ROM which operates with low power voltage. SOLUTION: A ROM which has hierarchical bit line structure possesses bias voltage-generating circuits B1-Bj which selectively supply bit lines with bias voltage through ground lines GL1 and GLj. In the case that an off cell is selected and all the cells adjacent to the selected cell are programmed as ON cell, bias voltage is applied to the sub-bit line most adjacent to the selected cell, making use of a bias voltage generating circuit, during the time of precharge, so as to the solve the problem that the precharge level of the main bit line drops without being kept constant when the work line is activated. With this, the bit line precharge time becomes short, and there is no leakage current, so low Vcc and high-speed operation become possible. |
