发明名称 ATM CELL HIGH TRAFFIC DETECTING CIRCUIT
摘要 <p>PROBLEM TO BE SOLVED: To prevent the deterioration of transmission efficiency due to re- transmission by detecting that input traffic is beyond a prescribed level against the processing capability of this device informing a host of alarm, and detecting high traffic. SOLUTION: A Ta counter 102 counts the number (m) of input ATM cells per a unit time (ta) from an asynchronous transfer mode(ATM) line side. A Tb counter 103 counts the number of output ATM cells per a unit time to a device bus. A timer 104 supplies a treference time to the Ta counter 102 and the Tb counter 103. A comparing part 105 obtains n/ta(input traffic) from the Ta counter 102 and m/tb(device processing capability) from the Tb counter 103 in a constant cycle, and compares them. Then, at the time of judging the high traffic high traffic alarm is informed to a host 120. The host 120 acts on a communicating opposite terminal so that the input traffic can be decreased.</p>
申请公布号 JPH10210049(A) 申请公布日期 1998.08.07
申请号 JP19970019880 申请日期 1997.01.17
申请人 NEC CORP 发明人 HARADA YOSHIHISA
分类号 H04Q3/00;H04L12/28;(IPC1-7):H04L12/28 主分类号 H04Q3/00
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