发明名称 Current slew rate limiter
摘要 A current slew rate limiter for limiting the rate at which current is applied to the base of an NPN output transistor. Current is applied to the output transistor base via a first output port of a current splitter. The current provided by the second output port of the current splitter is fed back to the input of the current splitter via an NPN current mirror and a PNP current mirror connected in series. A current limiting resistor is provided in at least one of the input and output circuits of the PNP current mirror to limit the maximum output current to the base of the NPN output transistor.
申请公布号 US5789955(A) 申请公布日期 1998.08.04
申请号 US19960729628 申请日期 1996.10.10
申请人 CHERRY SEMICONDUCTOR CORPORATION 发明人 SCHERAGA, WILLIAM J.
分类号 H03F1/26;H03F1/30;H03K17/16;(IPC1-7):H03K5/12 主分类号 H03F1/26
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