发明名称 Automated development of timing diagrams for electrical circuits
摘要 A computer-implemented method and apparatus that automates the entry, modification, and verification of timing diagrams for electrical circuits. The computer-implemented method and apparatus also provides an automated mechanism for analyzing these timing diagrams and verifying that the timing relationships specified for the circuit are met using the parts selected for the circuit.
申请公布号 US5790435(A) 申请公布日期 1998.08.04
申请号 US19960712399 申请日期 1996.09.13
申请人 CHRONOLOGY CORPORATION 发明人 LEWIS, LAWRENCE E.;MEREDITH, MICHAEL S.
分类号 G06F17/50;(IPC1-7):G06F3/00 主分类号 G06F17/50
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