Apparatus and method for timing self-timed circuitry

摘要

A method and apparatus for timing self-timed circuitry measures the cycle time of a self-timed system or circuit. An input pattern generator generates a plurality of data input patterns that are sequentially input to the self-timed system or circuit. A valid output signal, generated after the self-timed system or circuit produces output signal(s) in response to each data input pattern and signals the input pattern generator to change the input to the next data input pattern. A timer measures the total amount of time required for the self-timed system or circuit to generate output signal(s) in response to the sequential input of each of the data input patterns. A counter counts the number of times a valid output signal is generated as the apparatus loops through each of the data input patterns. The timer result is divided by the counter result to determine the average cycle time (time delay) of a self-timed system or circuit across multiple data input patterns.