| 摘要 |
A cycle slip detector of the invention has first and second comparators. The first comparator determines that the value of a phase error signal being supplied thereto is larger than a first threshold value near a maximum value possibly taken by the phase error signal, and responsively generates a first determining signal. The second comparator determines that the value of the phase error signal being supplied thereto is smaller than a second threshold value of a minimum value possibly taken by the phase error signal, and responsively generates a second determining signal. The cycle slip detector generates a cycle slip detecting signal when the first determining signal and the second determining signal generate in succession. By applying the cycle slip detector as mentioned, it is possible to provide a phase locked loop circuit having a wide frequency range in which a withdraw or pull-in operation is permitted. If the cycle slip detector is applied to a digital signal reproducing apparatus, it is possible to reduce an access time required to read a signal at a specified recording position on an recording medium from the unlock state of the phase locked loop circuit.
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