| 摘要 |
A data sensing apparatus and method of a multi-bit memory cell includes a first step of generating 2m-1 different reference voltages, a second step of applying a first intermediate reference voltage between at least two of the reference voltages to a control gate of the memory cell and outputting a binary bit as a highest bit depending upon detection of a drain current from the memory cell, and a third step of applying a second intermediate reference voltage between at least two of the reference voltages among the reference voltages lower than the first intermediate reference voltage applied to the control gate when the drain current is detected in the second step, and applying a third intermediate reference voltage between at least two of the reference voltages among the reference voltages higher than the first intermediate reference voltage applied to the control gate at the memory cell when the drain current is not detected, so as to output a lowest bit by repeatedly outputting data depending on whether the drain current is detected.
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