| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide a nonvolatile semiconductor memory device which is easy to layout, enables the reduction of the layout area, is easy to design, does not need a depression transistor, and enables the reduction of the manufacturing processes. SOLUTION: This memory device has latching circuits LTC0-LTC3 which latch ground level or power supply voltage level writing data and are provided so as to correspond to a plurality of bit lines BL0-BL3, a plurality of n-channel medium withstand voltage transistors T0-T3 which are connected between the respective bit lines and the respective latching circuits and correspond to the writing forbidding voltages and writing circuits which put the medium withstand voltage transistors T0-T3 into discontinuity states and charge the bit lines to be at the writing forbidding voltage 8V before the writing and apply power supply voltage signals to the gate electrodes of the medium withstand voltage transistors T0-T3 at the time of the writing.</p> |
