| 摘要 |
PROBLEM TO BE SOLVED: To restrain the increase of wiring resistance and suppress the increase of voltage drop and wiring delay which are caused by the increase of wiring resistance, when a plurality of kinds of microcells different in the number of essentially necessary metal wiring layers are mixedly mounted on the same LSI chip. SOLUTION: A plurality of kinds of microcells, provided with N(>=3) or more metal wiring layers are formed on a semiconductor substrate 10 of an LSI. At least one macrocell out of the above macrocells is provided with the following: a wiring pattern by the (N-2)-th wiring layer 22, the (N-1)-th layer wiring pattern 24b and the (N-1)-th layer wiring contact pattern 24c of the (N-1)-th wiring layer 24, the N-th layer wiring pattern 26b of the N-th wiring layer 26 which pattern 26b has the same pattern as the (N-1)-th layer wiring pattern, and the N-th layer wiring contact pattern 26c which has the same pattern as the (N-1)-th layer wiring contact pattern. |
