发明名称 |
Multi-layer electrical interconnection methods and field emission display fabrication methods |
摘要 |
A flat-panel field emission display comprises a luminescent faceplate, a rigid backplate, and an interposed or sandwiched emitter or cathode plate. A dielectric connector ridge is screen-printed over the faceplate's rear surface. Upper and lower level conductors are then screen printed over the faceplate. The lower-level conductors are applied directly on the faceplate rear surface. The upper-level conductors are applied atop the connector ridge. A plurality of bond wire interconnections extend between individual screen-printed conductors of the upper and lower levels. The bond wire interconnections create inter-level electrical interconnections between said individual screen-printed conductors. The cathode plate is positioned over the connector ridge. The cathode plate has a plurality of die bond pads facing the faceplate rear surface and aligned with the upper-level conductors. A plurality of conductive bonds such as flip-chip connections are positioned between the die bond pads and the facing upper-level conductors.
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申请公布号 |
US5786232(A) |
申请公布日期 |
1998.07.28 |
申请号 |
US19970778311 |
申请日期 |
1997.01.02 |
申请人 |
MICRON DISPLAY TECHNOLOGY, INC. |
发明人 |
STANSBURY, DARRYL M. |
分类号 |
H01J9/18;H01J9/24;H01J29/02;H01J29/92;(IPC1-7):H01L21/60 |
主分类号 |
H01J9/18 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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