发明名称 MATRIX COMMUTATOR ASSEMBLY
摘要 FIELD: commutation of special-purpose multiprocessor systems, microcontroller networks and units of parallel information exchange in telemetry systems. SUBSTANCE: device has first, second and third units for processing message queues, multiplexer, unit for analysis of message queues, register, decoder, synchronization unit, flip-flop, first AND gate. Goal of invention is achieved by introduced message transmission unit, second to eighth AND gates, first to fourth OR gates. Device provides connection of any of three input channels to any of three output channels. Messages from different input channels are received simultaneously. EFFECT: increased functional capabilities, possibility to design commutation structures for adaptive message routing, facilitated scalability for fixed message length. 7 dwg, 1 tbll
申请公布号 RU2116664(C1) 申请公布日期 1998.07.27
申请号 RU19960108431 申请日期 1996.04.24
申请人 KURSKIJ GOSUDARSTVENNYJ TEKHNICHESKIJ UNIVERSITET 发明人 ZOTOV I.V.;KOLOSKOV V.A.;TITOV V.S.
分类号 G06F15/163;G06F7/00;H03K17/00;(IPC1-7):G06F7/00 主分类号 G06F15/163
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