Carry overflow detection for digital processor

摘要

The digital signal processor, DSP, has a bit shift register 11 an a code expansion unit 13 both with 32 bit input and a 40 bit output that is fed to an arithmetic logic unit 14. The units are coupled to a carry overflow detector 150 which controls the activation of a multiplexer 17 generating the output. Thus it allows the DSP to select a maximum value when a positive carry results or a minimum value when a negative value results.