发明名称 Bias stabilizing circuit
摘要 <p>The present invention relates to a bias stabilizing circuit for a field effect transistor formed of a compound semiconductor comprising: a bias circuit in which one output electrode of a bipolar transistor (Q100, Q120, Q130, Q140) which is applied at its base with a bias voltage is connected through a first resistor (R103, R123, R132, R143) to a power supply (+B) and the other output electrode thereof is grounded through a second resistor (R104, R124, R133, R144); and a field effect transistor (102, 122, 132, 142) formed of a compound semiconductor biased by said bias circuit, wherein one output electrode (100D, 120D, 130D, 140D) of said bipolar transistor (Q100, Q120, Q130, Q140) is connected to one output electrode of said field effect transistor (102, 122, 132, 142) and the other output electrode (100G, 120G, 130G, 140G) of said bipolar transistor (Q100, Q120, Q130, Q140) is connected to a gate of said field effect transistor (102, 122, 132, 142).</p>
申请公布号 EP0854570(A2) 申请公布日期 1998.07.22
申请号 EP19980104523 申请日期 1994.01.07
申请人 SONY CORPORATION 发明人 MAEKAWA, ITARU;OHGIHARA, TAKAHIRO;TANAKA, KUNINOBU
分类号 H03D7/12;H03F1/30;H03F3/193;H03F3/21;(IPC1-7):H03F1/30 主分类号 H03D7/12
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