发明名称 DATA PROCESSOR AND DATA PROCESSING METHOD
摘要 PROBLEM TO BE SOLVED: To improve throughput, to simplify functions of instructions, to decrease the number of pipeline stages, and to reduce overhead at the branching time by decomposing a complicated instruction into basic instructions and reading out and executing instructions at the same time in one machine cycle, thereby efficiently operating plural computing elements. SOLUTION: A register file 111 has register 1708 and bus switches 1700 to 1709. Each register four read ports and two write ports. The bus switches 1700 to 1709 are used to by-pass the register file 111 when a register specified in the destination field of a last instruction is used immediately by a next instruction. For example, the bus switch 1702 is a by-pass switch from a bus 129 to a bus 127 and opened when the destination register field of a 1st instruction is matched with the 1st source register field of a 2nd instruction.
申请公布号 JPH10187444(A) 申请公布日期 1998.07.21
申请号 JP19970352657 申请日期 1997.12.22
申请人 HITACHI LTD 发明人 HOTTA TAKASHI;TANAKA SHIGEYA;MAEJIMA HIDEO
分类号 G06F9/38;G06F7/00 主分类号 G06F9/38
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