| 摘要 |
The semiconductor memory device of the present invention includes a memory cell having a floating gate and a control gate, for maintaining data by shifting the threshold value. In the test mode, the data read from the memory cell is verified by the verify circuit. If the result of verify is not approved, the writing of data is carried out again. The number of times of such writing is counted by the count circuit. In the data table, various correlations between the numbers of times of write and write voltages are stored. The write voltage data corresponding to the number of times of write from the count circuit is selectively output from the data table. The write voltage data is written in the memory element by the write circuit. The voltage at the other terminal of the voltage limiting circuit for varying the write voltage, is divided into several voltages, and thus the write voltage can be varied. The control circuit controls the dividing circuit such as to set the write voltage indicated by the write voltage data in the memory element in the write mode. Thus, the write voltage is optimized, and the appropriate number of times of write can be performed.
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