发明名称 |
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE |
摘要 |
PROBLEM TO BE SOLVED: To provide a technique which improves reliability of a semiconductor integrated circuit device with an MISFET, formed in an SOI board. SOLUTION: A 0.05 to 0.2μm-thick thin film silicon layer 3 with an impurity concentration of 10<17> /cm<3> or more is formed between an LOCOS oxide film 4 and a embedded oxide film 2. Since minority carriers generated in a channel region thereby diffuse through the thin-film silicon layer 3 below the LOCOS oxide film 4, change in a threshold voltage of an MISFET by storage of the minority carriers can be restrained.
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申请公布号 |
JPH10189978(A) |
申请公布日期 |
1998.07.21 |
申请号 |
JP19960341766 |
申请日期 |
1996.12.20 |
申请人 |
HITACHI LTD |
发明人 |
TAMAOKI YOICHI;IKEDA TAKAHIDE;WAKAHARA YOSHIFUMI;HORIUCHI KATSUTADA;HIGUCHI HISAYUKI |
分类号 |
H01L27/08;H01L21/336;H01L29/786;(IPC1-7):H01L29/786 |
主分类号 |
H01L27/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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