| 摘要 |
<p>PROBLEM TO BE SOLVED: To enable the execution and confirmation of program data within the period of every machine cycle. SOLUTION: Address data (m) are set to an address register 3 by starting a system clock PH2 in a processing period S1 and applied through a multiplexer 5 to a program memory 1 from the rise of system clock PH2 in the processing period S2 to the fall of system clock PH2 in a processing period S2. Program data DATA(m) read out of address in the program memory 1 are latched by a latch circuit 12 at the fall of clock B in the processing period S2 and transferred to a data bus 9 only during the high level term of pulse B in a processing period S5 so that data confirmation is enabled.</p> |
