发明名称 MEMORY AND MICROCOMPUTER
摘要 <p>PROBLEM TO BE SOLVED: To reduce the current consumed by a memory and microcomputer system to irreducible minimum, by making a high-speed mode consuming a large amount of current and a low-speed mode consuming a small amount of current selectable from the outside. SOLUTION: The memory is constituted of a high-speed mode memory map 1 accessible at a high speed while consuming a large amount of current, and a low-current mode memory map 2 accessing at a low speed and driving with a small amount of current. The memory has an indicating means (either a physical instructing means or a logic instructing means) for instructing for a low-current mode transition command 3 or a high-speed mode transition command 4. The memory is accordingly switched by the instruction means to drive at a high-speed mode 1, whereby a sense amplifier operates and a bypass circuit does not operate or at a low-current mode 2, whereby the bypass circuit operates and the sensor amplifier does not operate. The memory itself is provided with a function corresponding to the instruction, so that the wasteful consumption of current is avoided.</p>
申请公布号 JPH10188567(A) 申请公布日期 1998.07.21
申请号 JP19970296682 申请日期 1997.10.29
申请人 HITACHI LTD 发明人 TSUCHIYA MASAHIRO;SUGAI MASARU;KIDA HIROYUKI
分类号 G11C11/41;G06F12/00;G06F12/06;G06F15/78;G11C7/00;(IPC1-7):G11C11/41 主分类号 G11C11/41
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