Output driver that parks output before going tristate

摘要

Disclosed is a tristate circuit driver capable of both parking the output in a deasserted state and switching to a tristate mode in less than one clock cycle. In a preferred embodiment, the driver circuitry utilized a delay device to generate a pulse signal immediately after the transition in an enable signal is detected. The pulse signal then causes the tristate driver to output a signal of a predetermined voltage for a duration of less then one clock cycle.