发明名称 Method and arrangement for recovering timing from a digital signal
摘要 The invention concerns a method of recovering timing from a digital signal (In) using a phase-locked loop. The phase deviation between the digital signal (In) and an output signal (Out) from an oscillator (3) is determined, and a loop regulator (5) controls the oscillator (3) as a function of the phase deviation determined, in order to minimize the latter. The method is characterized by the detection of phase deviations caused by stuffing processes in the digital signal (In) and by the minimizing of the phase deviation portion caused by stuffing processes, which deviation is to be fed to the loop regulator (5).
申请公布号 AU5548998(A) 申请公布日期 1998.07.17
申请号 AU19980055489 申请日期 1997.12.08
申请人 SIEMENS AKTIENGESELLSCHAFT 发明人 ARMIN SPLETT
分类号 H03L7/093;H04J3/07 主分类号 H03L7/093
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