| 摘要 |
A control processor is connected to a subscriber line interface circuit to control the operating mode of the line interface circuit and monitor, via a detector output terminal of the line interface circuit, the status of the line connected to the line interface circuit. The control processor is adapted to control the line interface circuit to ensure, at a first point of time, that its detector output terminal is in a first signal state and, at that first point of time, to initiate a measurement of the line voltage. The line interface circuit is adapted, at a second point of time, to bring the detector output terminal to a second signal state after a time interval whose length in a predetermined manner is proportional to the measured line voltage, and the control processor is adapted to convert the time interval during which the detector output terminal of the line interface circuit is in the first signal state to a voltage value corresponding to the line voltage. |
