Reference plane metallization on an integrated circuit

摘要

Integrated circuit signal inductance and cross talk is reduced by the use of dedicated patterned metallization layers as substantially continuous voltage reference planes. The voltage reference planes are either inserted between patterned metallization layers used for signal propagation, used as the top level of metal or the bottom level of metal. Two of the substantially continuous voltage reference planes may be placed adjacent to one another with no signal layer intervening to provide improved circuit power/ground impedance.