发明名称 Highly efficient method and structure for motion compensation in a video decompression system
摘要 A novel method and structure for the implementation of Half Pixel Filtering and Block Averaging that are efficient for implementation on a general purpose CPU. The number of required operations are reduced by operating on multiple pixels simultaneously using sliced arithmetic, while maintaining full accuracy. In certain embodiments, the number of operations are further reduced by compromising full accuracy. This approximation is applicable to decoding of bi-directional frames.
申请公布号 US5781664(A) 申请公布日期 1998.07.14
申请号 US19970949019 申请日期 1997.10.10
申请人 NATIONAL SEMICONDUCTOR CORPORATION 发明人 BHEDA, HEMANT;SRINIVASAN, PARTHA
分类号 H04N7/26;H04N7/36;(IPC1-7):G06K9/36 主分类号 H04N7/26
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