发明名称 Image processing apparatus and mapping method for frame memory
摘要 An image processing apparatus for storing image data into or from a frame memory is disclosed. The image data includes plural pieces of element data arranged in a matrix form of first predetermined numbers of rows and columns. The image processing apparatus includes a memory controller for controlling access to the frame memory for writing or reading the image data in or from the frame memory. The memory controller is configured to access the frame memory in either a raster unit consisting of one line of plural pieces of element data in the first predetermined numbers of rows and columns or a block unit consisting of plural pieces of element data arranged in a matrix of second predetermined numbers of rows and columns. The second predetermined number is smaller than the first predetermined number. A raster access address generator is connected to the memory controller and generates a raster access address for accessing the frame memory to write or read the image data in the raster unit. A block access address generator is connected to the memory controller and generates a block access address for accessing said frame memory to write and read the image data in the block unit.
申请公布号 US5781242(A) 申请公布日期 1998.07.14
申请号 US19970799341 申请日期 1997.02.13
申请人 SANYO ELECTRIC CO., LTD. 发明人 KONDO, KAZUHIKO;TAKEUCHI, MINORU
分类号 H04N5/77;H04N5/907;(IPC1-7):H04N5/77 主分类号 H04N5/77
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