发明名称 A METHOD AND APPARATUS FOR BIT CELL GROUND CHOKING FOR IMPROVED MEMORY WRITE MARGIN
摘要 <p>A method and apparatus to increase the size of the design window for write margin and read stability margin of memory cells without requiring a voltage above the power supply voltage or below ground. An SRAM (300) consisting of an SRAM cell (320) having a ground reference (V. sub. GND) and a circuit (340) coupled to receive a first signal (T. sub. STRONG) and coupled to drive the ground reference. The circuit is configured to drive the ground reference to a first voltage if the first signal is in a first state. The circuit is configured such that the first node is at a second voltage if the first signal is in a second state, the first signal being in the first state indicating a write operation, the first signal being in the second state indicating a non-write operation, the first voltage being greater than the second voltage.</p>
申请公布号 WO1998029875(A1) 申请公布日期 1998.07.09
申请号 US1997023214 申请日期 1997.12.11
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