Elektronischer Schaltungs- oder Kartenprüfer und Verfahren zur Prüfung einer elektronischen Vorrichtung
摘要
This invention relates to electronic circuit testing and more particularly to an apparatus and a method utilizing enhanced test data compression techniques. An electronic circuit or board tester according to the invention comprises one tester circuit with a combination of a sequencer and a vector-sequencer-memory per pin. The test-data-sequence to be applied to a pin of a device under test is compressed in order to save memory space. <IMAGE>
申请公布号
DE69502827(D1)
申请公布日期
1998.07.09
申请号
DE1995602827
申请日期
1995.08.10
申请人
HEWLETT-PACKARD GMBH, 71034 BOEBLINGEN, DE
发明人
HEITELE, WINFRIED, D-71032 BOEBLINGEN, DE;ZSCHIEGNER, STEFAN, D-71034 BOEBLINGEN, DE