发明名称 Method for fabricating highly conductive vias
摘要 <p>The present inventors have discovered that the thickness uniformity of a plated metal layer inside a via hole can be enhanced by intersecting a conductive via (21) with an insulating aperture (40) before plating. The new via configuration improves the mass transfer of the plating. It is believed that the apertures lower the local solution ohmic resistance near the via holes. The method can be applied to the manufacture of a wide variety of circuit boards. <IMAGE></p>
申请公布号 EP0740496(B1) 申请公布日期 1998.07.08
申请号 EP19960302699 申请日期 1996.04.17
申请人 AT&T IPM CORP. 发明人 LAMBRECHT, VINCENT GEORGE, JR.;ROY, APURBA;LAW, HENRY HON;THOMSON, JOHN, JR.;WU, TE-SUNG
分类号 H05K3/42;H01F17/00;H01F41/04;H01L21/48;H05K1/03;H05K1/09;H05K1/11;H05K3/00;H05K3/24;H05K3/40;(IPC1-7):H05K3/42 主分类号 H05K3/42
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