Processor for selectively performing multiplication/division

摘要

A processor 10 for selectively performing multiplication or division of two inputs comprises a pre-processing unit 20 for modifying the signs of the inputs; an aligning unit 30 for aligning bit positions of the sign-modified inputs; an arithmetic unit 40 for selectively performing multiplication or division of the sign-modified and bit-aligned inputs; a post-processing unit 50 for modifying the signs of outputs from the arithmetic unit; and a control unit 70 for controlling operations of the pre-processing unit, aligning unit, arithmetic unit, and post-processing unit.