Bit-line pull-up circuit or static random access memory (SRAM) devices

摘要

A bit-line pull-up circuit for an SRAM device which utilizes an improved diffusion structure for enhanced immunity of the SRAM device against electrostatic discharge. The improved diffusion structure includes an undivided diffusion region that serves as a common drain for a plurality of MOS transistors. The undivided diffusion region has at least a pair of recessed diffusion edges formed on opposite sides thereof. The forming of the recessed diffusion edges prevents the so-called electrical field crowding effect and also enhances ESD immunity for the MOS transistor. Further, since the drain diffusion region is an undivided area, an increased number of metal contact windows are provided therein, and at least one of the metal contact windows is arranged substantially between the two recessed diffusion edges. In the event of an electrostatic discharge, this allows the discharge current flowing into the drain to be divided into a greater number of small-magnitude currents flowing to the source.