发明名称 Method for fabricating a triple well for bicmos devices
摘要 To accomplish the above objectives, the present invention provides a method of fabricating a collector well in a semiconductor BiCMOS device. The method begins by providing a substrate having c-well areas, N-well areas, and P-well areas. The substrate has n-plug doped regions in said c-well areas. A stress release oxide layer is grown over the substrate surface. A first nitride layer 27 is formed over the stress release oxide layer 26. A C-well mask 29having C-well mask openings 28A is formed over C-well areas 28 and openings are formed in the first nitride layer. Impurities are implanted through the opening forming collector-well regions. The c-well mask is then removed. A n-well photoresist mask having n-well mask openings 42A is formed over the first nitride layer and openings are etched in the first nitride layer over N-well areas 40. Ions impurities are implanted through the n-well nitride opening 42A forming n-well regions 44 in the n-well area in the substrate 10. The n-well mask 42 is then removed. A triple well oxide layer 45, 46 is formed over the n-well region 44, the c-well region and the n plug regions. The first nitride layer is then removed. Ion impurities into the substrate are implanted using the triple well oxide layer as a mask forming a p-well region and completing the triple well structure.
申请公布号 US5776807(A) 申请公布日期 1998.07.07
申请号 US19970910270 申请日期 1997.08.13
申请人 TRITECH MICROELECTRONICS, LTD. 发明人 RONKAINEN, HANNU;MINGHUI, GAO
分类号 H01L21/8249;(IPC1-7):H01L21/823 主分类号 H01L21/8249
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