| 摘要 |
In order to connect a computer comprising plural redundant processors to at least one digital data transfer bus, the interfacing device embodying the invention comprises: a means for synchronizing and comparing the transmission and reception requests respectively transmitted by the processors, and for triggering processing of a request when the latter has been transmitted by all the processors, a means for transferring the data blocks to be transmitted or received between a controller of said bus and the respective working memories of the processors, and a means for triggering the transfer of a data block if the latter is simultaneously at the output of all the processors, from one of the working memories to said bus controller, with a view to transmission thereof on said bus.
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