| 摘要 |
When a signal having inclined flanks, e.g. as a result of a transmission of the signal, is detected, varying pulse widths will occur depending on the signal composition of logic 0's and 1's. These varying pulse widths are a problem when setup and holding times for a detection circuit are to be observed. The invention provides a signal having more ideal pulse widths, also even if the logic 0's and 1's are distributed dissimilarly. The DATA signal is detected by means of a comparator (6) to generate the detected pulse signal VD, which is sampled by means of the circuit (8) controlled by the clock extraction circuit (7). This results in the reference pulse signal VQ, and a reference signal for the comparator (6) is generated by means of the circuit (9) so that the pulse width of VD is approximately equal to the pulse width of VQ.
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