U-shaped capacitor for DRAM

摘要

A capacitor has a first storage node (25a) formed in and around a via in an insulating layer (22) on a substrate (21), a second storage node (29) formed at the periphery of the first node, a dielectric layer (30) on the surfaces of the nodes and a plate-like node (31) on the dielectric layer. The novelty is that the second storage node (29) has a flat edge. Also claimed is a capacitor production process involving: (a) coating a substrate (21) with a first insulating layer (22) having a via reaching the substrate; (b) producing a first conductive layer (25a) in the via and on the insulating layer; (c) successively producing a second insulating layer and a wider third insulating layer on a predetermined portion of the first conductive layer; (d) producing a second conductive layer (29) which surrounds the first insulating layer and contacts the first conductive layer and which has a flat edge; (e) removing the second and third insulating layers; (f) producing a dielectric layer (30) on the faces of the first and second conductive layers; and (g) producing a third conductive layer (31) on the dielectric layer. Further claimed are similar capacitor production processes in which three insulating layers are produced either in step (a) or step (c).