Circuit indicating the phase relations between plural signals of the same frequency and its application in a circuit for adjusting the phase differences between these signals

摘要

The present invention relates to a circuit indicating the first or last signal activated among n signals (CK1 to CKn), comprising flip-flops (30) associated respectively with signal pairs (CKi, CKj), a first signal (CKi) of each pair being applied to a 0-reset input of the flip-flop and a second signal (CKj) of each pair on a 1-setting input, and logic gates (52, 56) associated respectively with each signal in question (CKp), connected in order to indicate that the signal in question is the first or the last activated when the flip-flops associated with all the pairs of signals (CKp, CKj) including the signal in question are in appropriate respective states after the activation of the first or last signal activated.