发明名称 A data writing circuit for a nonvolatile semiconductor memory
摘要 <p>A data writing circuit includes: a transfer gate (TG) selecting a bit line (BLO) of a virtually grounded cell array; a latch circuit (L) connected to the bit line (BLO) via the transfer gate (TG) for latching the data to be written, given to the bit line; a switching circuit (PM) which is connected between the bit line (BLO) and a program power source (VPROG) and is activated in accordance with the data to be written which has been latched by the latch circuit (L), to thereby supply the program power source (VPROG) to the bit line (BLO). This circuit, in accordance with the data to be written, sets the bit line (BLO) to which a memory cell (M) is connected, to a state of being applied by the program power source (VPROG) or a floating state. &lt;IMAGE&gt;</p>
申请公布号 EP0851432(A2) 申请公布日期 1998.07.01
申请号 EP19970310489 申请日期 1997.12.23
申请人 SHARP KABUSHIKI KAISHA 发明人 HIRANO, YASUAKI
分类号 G11C16/04;G11C16/06;G11C16/10;G11C16/12;(IPC1-7):G11C16/06 主分类号 G11C16/04
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