发明名称 A process for manufacturing a semiconductor device
摘要 Implantation of a high concentration of P type impurity in an emitter electrode can be prevented during forming a source-drain of PMOS and a extrinsic base, by keeping an insulating film intact only on an emitter electrode and simultaneously patterning the insulating electrode and a gate electrode, leading to prevention of increase and dispersion of an emitter resistance. <IMAGE>
申请公布号 EP0851486(A1) 申请公布日期 1998.07.01
申请号 EP19970122190 申请日期 1997.12.16
申请人 NEC CORPORATION 发明人 SUZUKI, HISAMITSU
分类号 H01L27/092;H01L21/8222;H01L21/8238;H01L21/8248;H01L21/8249;H01L27/06 主分类号 H01L27/092
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