发明名称 Computational circuit
摘要 Addition is performed by a capacitive coupling or resistive coupling. A quantizing circuit is realized by plurality of thresholding circuits receiving an analog input voltages. Subtraction in performed by two MOSs of anti-polarity inputted analog input voltages to gates.
申请公布号 US5774008(A) 申请公布日期 1998.06.30
申请号 US19960766875 申请日期 1996.12.13
申请人 YOZAN INC;SHARP CORPORATION 发明人 SHOU, GUOLIANG;TAKATORI, SUNAO;YAMAMOTO, MAKOTO
分类号 G06G7/06;G06G7/14;G06G7/26;G06J1/00;G06N3/063;G11C27/02;(IPC1-7):G06G7/14;G06G7/42;H03K17/62 主分类号 G06G7/06
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