| 摘要 |
A color burst gate pulse forming circuit has a first counter, a second counter, a logic circuit, and a decoding circuit. The first counter counts a chrominance subcarrier supplied in a form of a clock. The second counter starts counting said chrominance subcarrier in synchronization with a horizontal synchronizing signal, and resets itself in a period longer than half a horizontal scanning period and shorter than one horizontal scanning period. The logic circuit controls the operating period of the first counter based on an output from the second counter and said horizontal synchronizing signal. The decoding circuit decodes a count output from the first counter, and outputs color burst gate pulses based on a predetermined count output.
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