| 发明名称 |
Enhanced branch delay slot handling with single exception program counter |
| 摘要 |
The handling of branch delay slots in MIPS microprocessors is enhanced. Branch instructions can be placed in branch delay slots by the judicious operation of the Exception Pointer Counter and the BD bit in the Cause register for exception handling.
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| 申请公布号 |
US5774709(A) |
申请公布日期 |
1998.06.30 |
| 申请号 |
US19950567944 |
申请日期 |
1995.12.06 |
| 申请人 |
LSI LOGIC CORPORATION |
发明人 |
WORRELL, FRANK |
| 分类号 |
G06F9/30;G06F9/38;(IPC1-7):G06F9/38 |
主分类号 |
G06F9/30 |
| 代理机构 |
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代理人 |
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| 地址 |
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