发明名称 |
Flash memory device |
摘要 |
The present invention relates to a flash memory device and is constructed in such a way that the memory cell blocks are sequentially selected according to the input of the erasing signal and the output voltage of the negative charge pump is supplied only to the selected memory cell block to prevent the degradation of the operational performance of the device due to excessive load applied to the output terminal of the negative charge pump at the time of erase operation. Therefore, the present invention relates to a flash memory device in which the magnitude of the load applied to the output terminal of the negative charge pump is effectively reduced and accordingly, the degradation of operational performance of the device can be prevented.
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申请公布号 |
US5774399(A) |
申请公布日期 |
1998.06.30 |
申请号 |
US19960730874 |
申请日期 |
1996.10.18 |
申请人 |
HYUNDAI ELECTRONICS INDUSTRIES, CO., LTD. |
发明人 |
KWON, GYU WAN |
分类号 |
G11C17/00;G11C5/14;G11C16/02;G11C16/06;G11C16/30;(IPC1-7):G11C11/34;G11C7/00 |
主分类号 |
G11C17/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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