发明名称 |
Pipelined scan enable for fast scan testing |
摘要 |
High speed scan testing is facilitated by pipelining or distributing a scan enable signal to scan circuits through a distribution network. The pipeline is formed from a plurality of scan enable distribution circuits residing on an integrated circuit to be scan tested. Preferably, before reaching the scan circuits, the scan enable signal passes through an equal number of the scan enable distribution circuits. The distribution network of the scan enable distribution circuits take a multitude of forms. The invention allows at-speed toggling of a scan enable signal as well as shifting of test data at functional system frequencies, while maintaining compatibility with test modes such as IEEE Standard 1149.1. The invention is also capable of supporting skewed-load and broad-side delay test modes.
|
申请公布号 |
US5774474(A) |
申请公布日期 |
1998.06.30 |
申请号 |
US19960616112 |
申请日期 |
1996.03.14 |
申请人 |
SUN MICROSYSTEMS, INC. |
发明人 |
NARAYANAN, SRIDHAR;LEVITT, MARC E. |
分类号 |
G01R31/3185;(IPC1-7):G01R31/28 |
主分类号 |
G01R31/3185 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|