发明名称 Operational transconductance amplifier and multiplier
摘要 A bipolar or MOS OTA is provided, in which no S/N degradation occurs due to compression and expansion of a signal, and low voltage operation can be realized at a power supply voltage of approximately 2 V for the input voltage range of approximately 1 V peak-to-peak or greater. This OTA includes a first differential pair of first and second transistors respectively driven by first and second current sources or sinks. A first resistor is connected to emitters or sources of the first and second transistors. A differential input signal is applied across these emitters or sources. This OTA further includes a second differential pair of third and fourth transistors. A second resistor is connected to emitters or sources of the third and fourth transistors. A current path is connected to the emitters or sources of the third and fourth transistors, thereby allowing a current to flow through the second resistor. The connection of the first and second pairs are so designed that each of the currents flowing through the third and fourth transistors contains a component proportional to the input signal. An output signal is derived from one of the emitters or sources of the third and fourth transistors.
申请公布号 US5774020(A) 申请公布日期 1998.06.30
申请号 US19960731467 申请日期 1996.10.15
申请人 NEC CORPORATION 发明人 KIMURA, KATSUJI
分类号 H03F1/32;H03F3/45;H03F3/68;(IPC1-7):H03F3/45 主分类号 H03F1/32
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