发明名称 BIT ERROR MEASURING INSTRUMENT
摘要 PROBLEM TO BE SOLVED: To measure a bit error without adjusting the phase of a burst gate signal by each channel by writing a retimed burst test signal in an FIFO memory and designating a desired optical subscriber's side equipment by the burst test signal so as to measure the bit error of a system to be measured. SOLUTION: A data generator 2 outputs the burst test signal to each optical subscriber's side equipment 7-1 to 7-n and outputs a burst gate signal to an error detector 4. Then the FIFO memory 17 successively writes the retimed burst test signal outputted by the retiming circuit 11 of a center side equipment 8 by a reproduced clock signal outputted by digital PLL. 12. Then in an order from the signal inputted earlier, the reproduced burst test signal of bit discontinuity is converted to the burst testing signal of bit continuity by the clock signal outputted by a clock source 3 and outputted to the detector 4.
申请公布号 JPH10178390(A) 申请公布日期 1998.06.30
申请号 JP19960336655 申请日期 1996.12.17
申请人 ANRITSU CORP 发明人 KAGAWA MITSUAKI
分类号 H04B10/556;H04B10/07;H04B10/077;H04B10/079;H04B10/27;H04B10/272;H04L1/00;H04L12/44 主分类号 H04B10/556
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