发明名称 High throughput planarization etch process for interlayer oxide films between metals and pre-metals
摘要 A method to planarize a partially completed semiconductor integrated device includes a first process to etch a first portion of a layer of photoresist on the device, a second process to etch the remaining layer of photoresist and to etch a first portion of an oxide on the device, and a third process to etch a second portion of the oxide layer on the device. The second process achieves an etch rate of approximately 5000 ANGSTROM per minute and the third process achieves an etch rate of approximately 2000 ANGSTROM per minute. The second process etches 80% of a targeted layer of oxide and the third process etches the remaining portion of the targeted layer of oxide.
申请公布号 US5773367(A) 申请公布日期 1998.06.30
申请号 US19960709568 申请日期 1996.09.06
申请人 INTEGRATED DEVICE TECHNOLOGY, INC. 发明人 JEN, JANG
分类号 H01L21/3105;H01L21/768;(IPC1-7):H01L21/00 主分类号 H01L21/3105
代理机构 代理人
主权项
地址