| 摘要 |
A PCI-ISA bridge device includes a PCI interface for driving a target ready signal line when PCI-ISA bridge device is address-specified as a current target by a read cycle on a PCI bus, and a status register for setting status information indicating respective states of a plurality of DMA request signals inputted to DMA controller. Further the PCI interface circuit includes a wait control circuit for inserting a predetermined wait time period in the timing for driving the target ready signal line, when the transaction is a read cycle for reading the content of the status register.
|
