发明名称 |
Videokode- og videodekodeapparat |
摘要 |
<p>An alpha-map encoder constituted of a first down-sampling circuit (21) which encodes alpha-map signals indicating the shape and position in a screen of an object at a reduction rate according to size conversion ratio information, an up-sampling circuit (23) which up-samples a down-sampled alpha-map signal for returning the signal to the original size at an enlargement rate according to the size conversion ratio information and outputs a locally decoded alpha-map signal, a motion compensative prediction circuit (25) which generates a motion compensative prediction signal based on the preceding reproduced image signal, the reproduced image signal of the circuit (21), and a motion vector signal, a second down-sampling circuit (26) which down-samples the motion compensative prediction signal at a predetermined reduction rate, a binary image encoding circuit which encodes the alpha-map signal down-sampled by means of the first down-sampling circuit (21) into a binary image in accordance with the motion compensative prediction signal down-sampled by the circuit (26) and outputs the binary image encoded signal, and a multiplexing circuit which multiplexes and outputs the binary image encoded signal and the information on the enlargement rate. <IMAGE></p> |
申请公布号 |
NO983043(A) |
申请公布日期 |
1998.06.30 |
申请号 |
NO19980003043 |
申请日期 |
1998.06.30 |
申请人 |
TOSHIBA, KK |
发明人 |
YAMAGUCHI, NOBORU;WATANABE, TOSHIAKI;IDA, TAKASHI;KIKUCHI, YOSHIHIRO |
分类号 |
H04N19/50;G06T3/40;G06T9/00;H03M7/36;H03M7/42;H04N19/107;H04N19/13;H04N19/134;H04N19/136;H04N19/14;H04N19/166;H04N19/167;H04N19/176;H04N19/186;H04N19/196;H04N19/20;H04N19/423;H04N19/46;H04N19/463;H04N19/503;H04N19/51;H04N19/517;H04N19/52;H04N19/59;H04N19/60;H04N19/61;H04N19/65;H04N19/68;H04N19/70;H04N19/80;H04N19/85;H04N19/91;(IPC1-7):H04N |
主分类号 |
H04N19/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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