摘要 |
A method of generating a system clock signal by means of a controlled oscillator (2), wherein the system clock signal may periodically be locked to a selected one of a plurality of external reference signals, comprises measuring a phase difference between the reference signal and the system clock signal for each of the external reference signals, and using the measured phase difference for the selected reference signal to control the controlled oscillator. A corresponding circuit for generating a system clock signal includes means (11, 12; 17) for each of the external reference signals for measuring a phase difference between the reference signal and the system clock signal and for generating an error signal in response to the measured phase difference. The circuit comprises means (13) for selecting one of the measured error signals and for using this to control the controlled oscillator (2). |